
Senior Physical Design Engineer
4 days ago
Job Title: Senior Physical Design Engineer
This position is ideal for an experienced Physical Design Engineer with a strong background in Full-chip/Block implementation covering Floorplanning, Placement, Budgeting, Clock Tree planning & analysis, Scan re-ordering, Clock tree synthesis, Placement optimizations, Routing, Timing and SI analysis/closure, ECO tasks (both timing and functional), EM/IR, DRC, LVS, ERC analysis & fixes, Low Power solution development & implementation.
- We seek a skilled engineer who has worked on advanced process nodes such as 16nm and/or 7nm. Strong knowledge of EDA tools such as DC, ICC2, Cadence Innovus, STAR-RC, PT-SI, Verplex, Quartz, Calibre, internal tools & flow, etc. required.
- The successful candidate will work closely with the methodology team to solve implementation challenges & provide inputs to improve the Physical design flow.
Required Skills:
• Experience: 4+ years experience in ASIC physical design
• Skills: Block implementation, extraction, timing and/or full-chip designs, Strong communication skills, TCL/Perl development skills
• Leadership Role: Experience as a full-chip floorplanning, routing, or timing lead for a large silicon project, Track record of taping out complex chips on advanced process nodes
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