Senior Verification Engineer for Complex Digital Designs
3 weeks ago
As a Senior Verification Engineer at Analog Devices, you will be responsible for owning the end-to-end verification process for IP, subsystem, or SOC-level designs. Your expertise will be utilized to verify complex microprocessor designs, neural networks, and high-speed peripherals using leading-edge verification methodologies. You will collaborate with the design team to develop and review test plans, ensuring the closure of code and functional coverage.
Key Skills and Qualifications
- B.Tech/M.Tech with 2+ years of industry experience in Digital Pre-Silicon verification.
- Strong knowledge of test-plan generation, coverage analysis, transaction-level modeling, pseudo-random, and constrained-random techniques with System Verilog.
- In-depth knowledge of SV-UVM and debugging of testbenches is a must.
- Experience in closing the verification of block, subsystem-level verification using industry-standard metrics like code and functional coverage is a must.
- Expertise on NOC, Bus, and Interconnect Verification. Coverage Analysis and improvements.
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