
Principal Digital Fault Tolerance Engineer
2 days ago
About the Role:
We are seeking a seasoned digital fault tolerance engineer to spearhead comprehensive design and implementation of verification strategies.
Responsibilities include architecting innovative solutions for built-in self-test circuitry, collaborating with cross-functional teams, and driving technology advancements in next-generation semiconductor design.
Key Responsibilities:
- Pioneer cutting-edge DFT designs and strategies
- Develop and implement novel Scan and built-in self-test circuitry architectures
- Leverage expertise in Tcl, Perl, and Shell scripting to streamline workflows
- Drive innovation through collaboration with DFT and cross-functional teams
- Staying up-to-date with latest technologies (28nm, 16nm, 7nm)
Requirements:
- Mastery in digital fault tolerance engineering
- Demonstrated expertise in ASIC cycle and semiconductor design
- Hands-on experience with DFT implementation using standard EDA tools
- Strong fundamentals in VLSI/Electronics/Electrical/Computer/Instrumentation Engineering
Benefits:
eInfochips offers a dynamic work environment, opportunities for growth and development, and a chance to be part of a leading global provider of product engineering and semiconductor design services.
Join our team of over 2500 engineers who have developed over 500 products and achieved 40 million deployments in 140 countries worldwide.
We foster a culture of innovation, collaboration, and excellence. Be a part of our journey and shape the future of semiconductor design.
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