Senior ASIC Design Expert

4 days ago

Thiruvananthapuram, Kerala, India beBeeFault Full time ₹ 18,00,000 - ₹ 20,00,000
**Digital Fault Tolerance Engineer**We are seeking an experienced Digital Fault Tolerance (DFT) engineer to join our team. As a DFT engineer, you will design and develop innovative DFT architectures for complex System-on-Chip (SoC) and Application-Specific Integrated Circuit (ASIC) designs.Key Responsibilities:
  • Incorporate scan chains, boundary scan (JTAG), Memory BIST (MBIST), Logic BIST (LBIST), and other test structures into DFT features.
  • Collaborate with RTL and physical design teams to ensure seamless integration of DFT features.
  • Utilize Automatic Test Pattern Generation (ATPG) tools to generate and validate test patterns for stuck-at, transition, and path delay faults.
  • Analyze fault simulation and coverage results to optimize test quality.
  • Support silicon bring-up and debug of test-related issues in collaboration with the ATE team.
  • Work closely with Automated Test Equipment (ATE) teams to develop test programs and support production testing.
Requirements:
  • Proven experience in DFT engineering, including design and development of DFT architectures.
  • Familiarity with ATPG tools and ability to generate and validate test patterns.
  • Strong understanding of digital circuit design principles and test methodologies.
  • Excellent communication and collaboration skills, with experience working in cross-functional teams.
  • Bachelor's or Master's degree in Electrical Engineering, Computer Science, or related field.
Benefits:

We offer a competitive salary and benefits package, as well as opportunities for professional growth and development.

Additional Information:

This role is open to qualified candidates worldwide.

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