Senior ASIC Test Architect

1 week ago

Udaipur, Rajasthan, India beBeeDft Full time ₹ 18,00,000 - ₹ 22,00,000
Job Description:

We are seeking an experienced Senior DFT Engineer to join our team.

The ideal candidate will have a strong background in Design for Testability (DFT) and ASIC/SoC design, with expertise in developing and implementing DFT architecture.

Responsibilities include designing and verifying scan chains, boundary scan (JTAG), MBIST, LBIST, and other test structures, as well as collaborating with RTL and physical design teams to ensure seamless integration of DFT features.

A key aspect of the role is generating and validating test patterns using ATPG tools for stuck-at, transition, and path delay faults, as well as performing fault simulation and coverage analysis to optimize test quality.

The successful candidate will also be responsible for supporting silicon bring-up and debug of test-related issues, as well as working with ATE teams to develop test programs and support production testing.

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