Senior Design Verification Lead
1 week ago
Job Overview:
About the Role:
We are seeking an experienced Senior Design Verification Engineer with a strong background in leading complex verification projects. The successful candidate will be responsible for managing and executing design verification efforts, developing comprehensive verification strategies, and collaborating with cross-functional teams.
Key Responsibilities:
- Develop and execute verification plans to ensure successful project execution
- Create comprehensive verification strategies and test plans for high-speed peripherals
- Conduct gate-level simulations and power-aware verification using Xprop and UPF
- Analyze System Verilog assertions and coverage
- Collaborate with architects, designers, and pre/post-silicon verification teams
- Provide technical guidance and mentorship to junior engineers
- Ensure verification signoff criteria are met and documentation is comprehensive
Requirements:
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field
- Expertise in UVM (Universal Verification Methodology) and System Verilog
- Prior experience working on IP level and SOC level verification projects
- Proficient in verification tools such as VCS, Xsim, waveform analyzers, and third-party VIP integration
- Hands-on experience with UFS, Ethernet, PCIe, CXL, MIPI protocols
What We Offer:
- A competitive salary of $140,000 - $200,000 per year
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