Senior Test Engineer

6 days ago

Bengaluru, Karnataka, India beBeeMemory Full time ₹ 15,00,000 - ₹ 25,00,000
As a highly skilled Memory BIST Engineer, you will be responsible for implementing the hardware features that support testing and validation of memories in design.

Key Responsibilities:

  • Implementing memory test logic to support testing and validation of memories in design.
  • Collaborating with teams to enable integration and validation of test logic in all phases of the design flow.
  • Designing and debugging with minimal oversight, requiring good scripting skills.
  • Releasing high-quality patterns to the test team and supporting silicon bring-up and yield improvement.

Requirements:

  • Experience as an ASIC Design engineer with a broad mix of technologies including memory testing.
  • Knowledge of the latest trends in Memory testing and silicon engineering.
  • Hands-on experience in MBIST protocols and scan architectures.
  • Verification skills including System Verilog, LEC and validating test timing of the design.
  • Experience working with gate-level simulations and debug using VCS and other simulators.
  • Understanding of testbench in System Verilog, UVM/VMM is a plus.
  • Post-silicon validation and debug experience, ability to work with ATE patterns.
  • Strong verbal communication skills and ability to thrive in a dynamic environment.
  • Scripting skills: Python/Perl

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