Senior Design for Test Specialist

2 weeks ago

Jamnagar, Gujarat, India beBeeSoftware Full time ₹ 1,80,00,000 - ₹ 2,00,00,000
Design for Test (DFT) Engineer

Drive the definition and implementation of DFT architectures and methodologies for complex SoCs.

The ideal candidate will have strong expertise in:

  • Scan Insertion & Verification
  • ATPG (Automatic Test Pattern Generation)
  • MBIST (Memory Built-In Self-Test)
  • JTAG / Boundary Scan

Hands-on experience with industry-standard DFT tools and methodologies from Cadence, Synopsys, and Mentor Graphics is required.

The candidate should also have proven ability to develop and debug scripting solutions using Python, Perl, and TCL for automation of DFT flows.

Solid understanding of SoC design cycle, RTL to GDSII flow, and test requirements is essential. Experience collaborating with RTL designers, verification engineers, and physical design teams is necessary.

Strong problem-solving skills, ability to debug complex test issues, and deliver high-quality DFT solutions within tight schedules are required. Preferred Skills include knowledge of low-power DFT techniques, experience with post-silicon bring-up and ATE patterns, familiarity with safety-critical standards, and exposure to High-Speed IO testing.

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