Chief Architect of Complex Integrated Circuits

1 day ago

Jamnagar, Gujarat, India beBeeDesigner Full time ₹ 1,73,40,000 - ₹ 2,31,00,000
Senior Physical Design Engineer

Lead the physical design process of complex SoCs from floor planning to sign-off, providing technical guidance and mentoring junior engineers. Interface with front-end ASIC teams to resolve design issues, developing low power designs using techniques such as Voltage Islands, Power Gating, and Substrate-bias.

Achieve timing closure on DDR2/DDR3/PCIE interfaces, collaborating with cross-functional teams to ensure successful project execution.

This role requires 4-12 years of experience in physical design engineering, extensive knowledge of Cadence or Synopsys or Magma physical design tools, expertise in scripting languages such as PERL, TCL, and a strong background in ASIC physical design, including floor planning, P&R, extraction, IR Drop Analysis, Timing and Signal Integrity closure.

The ideal candidate will have excellent communication and documentation skills, with preferred skills including experience with 65nm or lower node designs, knowledge of static timing analysis in Primetime or Primetime-SI, and strong physical verification skill set.

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