Senior Design Enablement Engineer

4 weeks ago

Hyderabad, Telangana, India Micron Full time

Transforming Information into Intelligence

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence.

As a Senior Design Enablement Engineer, you will play a key role in developing Design Rules, Requirements, Test Structures, and improving process margin for all DRAM generations.

Responsibilities include:

  • Coordinating the work of engineers from multiple groups and geographies to develop Design Rules and Requirements.
  • Managing effort to build and evaluate test structures to provide data for next-generation devices.
  • Defining sub-milestones for the project within the layout schedule and working with teams to achieve targets and timelines.
  • Proactively identifying and addressing process issues and process window vs. die size issues.
  • Partnering with Design, Product Engineering, Process Integration, Business Units, and Quality groups to optimize PPAC (Performance, Power, Area, Cost) for all Micron DRAM products.
  • Ensuring the right DRCs (Design Rule Checks) are in place and reacting to deviations from established design rules.
  • Strategically partnering with multiple teams and fields to understand process issues related to database layout and prioritize development of solutions.
  • Summarizing sophisticated problems, deriving, and explaining actions taken to address them.
  • Driving effective multi-functional communication on issue resolution and supporting across-node Design Rule alignment.
  • Maintaining and implementing meaningful communication between Process Integration, Product Engineering, Design, and Advanced Mask teams.
  • Improving timely documentation of R&D activities with regard to design rule improvements for transfer to parts still in design.

Minimum Qualifications:

  • BS/MS/PhD in Electrical Engineering, Microelectronics, Physics, or related field.
  • Senior-level (5+ years) experience in the semiconductor industry in Process Integration, Yield Enhancement, Product Engineering, Design, Test Structure Development, or Unit Process Development.
  • Solid grasp and exposure to design & layout with the ability to do minor layout and work with Pcells.
  • Experience with Test Structure Design and characterization.
  • Success in resolving sophisticated issues.
  • Ability to think and communicate clearly in urgent and stressful situations.
  • Deep understanding of the DRAM process flow and major DRAM components.
  • Exposure and familiarity with CAD group interactions, data post-processing, and transferring data from the database to the reticle.

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