Digital Design Lead for Complex IPs

3 weeks ago


Noida, Uttar Pradesh, India Tessolve Full time

We are seeking a highly motivated and experienced Digital Design Lead to join our team in India.

About the Role

This is a challenging opportunity to lead the design of complex IPs using advanced Design for Test (DFT) skills and tools.

Job Summary

The successful candidate will have a strong background in DFT and experience with Synopsys, Cadence, or Mentor tools such as Tetramax, Modus, and Tessent.

Key Responsibilities
  • Design and deliver complex IPs using latest DFT skills and tools
  • Lead cross-functional teams to achieve project goals
  • Maintain high-quality standards and adhere to company processes
Requirements

To be successful in this role, you will need:

  • 8+ years of relevant experience in DFT
  • Strong knowledge of DFT architecture and hands-on experience with Scan, ATPG, Simulation & GLS
  • Prior experience with Synopsys, Cadence, or Mentor tools
  • Good simulation debugging skills
  • Technical documentation skills
  • Scripting skills in Perl, Python, Shell, or TCL
Benefits

Tessolve offers a highly competitive compensation package, including a salary of ₹20-25 lakhs per annum, depending on experience. Additionally, we offer a range of benefits, including health insurance, retirement planning, and career growth opportunities.

About Us

Tessolve Semiconductors is a leading Design and Test Engineering Service Company providing end-to-end solutions from product engineering to silicon bring-up. We have a global presence with offices in the US, India, Singapore, Malaysia, Germany, UK, China, Japan, Thailand, Philippines, and test labs in India, Singapore, Malaysia, Austin, San Jose.



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