Senior IC Memory Designer
1 week ago
We are seeking an experienced Senior Digital/Memory Mask Design Engineer to join our growing team of innovative individuals responsible for handling challenging high-speed digital memory circuit designs at NVIDIA. Our company has continuously reinvented itself over two decades, revolutionizing parallel computing and modern AI through our GPU invention in 1999. As a Senior Digital/Memory Mask Design Engineer, you will be part of a team that amplifies human creativity and intelligence through cutting-edge technology.
Key Responsibilities:
- Implement IC layout of innovative, high-performance, high-speed CMOS integrated circuits in foundry CMOS process nodes in 3nm, 5nm, 7nm, and lower nodes following industry standard methodologies.
- Deliver layouts for Full Custom Memory group specializing in digital Memory circuits.
- IP layout will comprise of significant digital components.
- Achieve best layout practices/methodology for composing digital Memory layouts.
- Follow company procedures and practices for IC layout activities.
Requirements:
- B.E/B Tech. / M Tech in Electronics or equivalent experience with 5+ Years of proven experience in Memory layout in advanced CMOS process.
- Detailed knowledge of industry standard EDA tools for Cadence.
- Experience with layout of high-performance memories of various types.
- Knowledge of Layout basics including the various types of bitcells, Decoder, LIO etc. (matching devices, symmetrical layout, signal shielding).
- Experience with floor planning, block level routing and macro level assembly.
- Detailed knowledge of top level verification including the EM/IR quality checks and detailed knowledge of layout dependent effects including LOD, Dummification, fills etc.
We are an equal opportunity employer and value diversity at NVIDIA. We do not discriminate based on race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.
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