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Digital Verification Expert
2 weeks ago
Senior Verification Engineer
">About the Role:We are seeking an experienced Senior Verification Engineer to join our engineering team in Bangalore/Hyderabad.
The successful candidate will be responsible for designing and developing high-quality verification environments for complex digital systems.
Key Responsibilities:- Design and develop functional verification environments using System Verilog/UVM, including monitors, checkers, scoreboards, and assertions.
- Develop and maintain expertise in PCI gen6, CXL3.1, Ethernet bus protocols, AMBA/AXI bus protocols, and ARM CPU architecture.
- Collaborate with cross-functional teams to identify verification requirements and develop testbenches.
- Analyze and debug complex issues using scripting languages like PERL, Python, Shell, or Makefile.
- Maintain code and functional coverage metrics to ensure high-quality designs.
- Contribute to the development of best practices and knowledge-sharing within the team.
- Bachelor's or Master's degree in Electronics Engineering, Computer Science, or related field.
- 4+ years of experience in system-level verification and validation.
- Strong understanding of digital design principles, synthesis, and place-and-route techniques.
- Proficiency in System Verilog/UVM, VHDL, and Verilog HDL.
- Experience with simulation tools like ModelSim, VCS, or Questa.
- Excellent problem-solving skills, attention to detail, and ability to work in a fast-paced environment.
- Experience with GLS (Global Logic Synthesis) verification tools.
- Familiarity with CI/CD pipelines and automated testing frameworks.
- Knowledge of agile development methodologies and Scrum framework.