Leading RTL-to-GDSII Implementation Engineer

About the Role:Our company seeks experienced engineers with a minimum of 5 years of relevant experience to join our team.The ideal candidate will possess strong technical expertise in synthesis and timing analysis, with hands-on experience across the complete RTL to GDSII flow.Key Responsibilities:Develop and maintain Design Compiler (DC) constraint...

We are seeking a highly skilled Physical Design Engineer to take on key design roles. This individual will be responsible for implementing block level physical design implementation from RTL to GDSII or netlist to GDSII, as well as providing technical guidance and leadership to junior engineers.Key Responsibilities:Implement block level physical design...

Senior Physical Design EngineerThe ideal candidate will have a minimum of 4-12 years of hands-on experience in block level physical design implementation, signoff, and timing signoff.Implement complex physical designs from RTL to GDSII or netlist to GDSIIPerform block level physical signoff and ensure timely delivery of projectsManage block level power...

Expert Physical Design Engineer RequiredWe are looking for a skilled Physical Design Engineer to join our team. The ideal candidate will have strong expertise in Physical Design flows and signoff methodologies, with excellent technical and communication skills.The successful candidate will be responsible for:Block-level Physical Design from RTL/Netlist to...

Physical Design Engineer Job DescriptionWe are seeking a highly skilled and experienced Physical Design Engineer with expertise in the RTL to GDS flow.The ideal candidate will possess strong scripting skills, hands-on experience with advanced process nodes, and a proven track record in physical design automation.Key ResponsibilitiesLead physical design...

Job Title: DFT ArchitectLocation: Kollam, IndiaEmployment Type: Full-timeIndustry: Semiconductors / ASIC / SoC DesignWe are seeking an experienced technical leader to drive the development and implementation of advanced test methodologies for complex SoC/ASIC designs. As a lead architect, you will be responsible for designing and implementing robust and...

Design Engineer - PCIe/CXL/IDE IP SolutionThe role of the Design Engineer involves developing high-quality RTL designs for complex protocols such as PCIe, CXL, and UALink. This position requires a strong understanding of digital design principles, excellent communication skills, and the ability to work effectively in a team environment.Develop RTL designs...

Senior RTL Design Engineer OpportunityWe are seeking highly experienced individuals who have a passion for innovation and are excited about the opportunity to create world-class products.This is a rare chance to design and implement high-performance TPUs/MPUs and other related AI blocks using RTL. You will own IP/block-level RTL from spec to GDS, including...

Senior Chip Design LeadJob Description:Lead the implementation of a complex mixed-signal SoC, working closely with cross-functional teams to deliver high-quality designs on time.Key Qualifications:Technical SkillsExperience in all phases of the IC design process from RTL->GDS2.Knowledge of and experience with analog/mixed/custom signal PNR.TSMC 7nm PNR...

Senior Logic Design Engineer - Core Units (Front End Pipeline)You will be part of a cutting-edge team responsible for designing and developing processor core front end pipeline units. This role offers the opportunity to work on high-performance systems that are driving the quantum revolution and AI era.Your Key ResponsibilitiesLead the architecture, design,...