Digital Design Assurance Specialist
2 weeks ago
Job Summary:
- To develop and execute verification test plans based on design specifications to ensure that the design meets required standards.
Key Responsibilities:
- Develop and execute verification test plans based on design specifications.
- Utilize SystemVerilog/UVM for creating constrained-random and directed testbenches.
- Develop functional coverage models to drive coverage closure.
- Investigate simulation failures, analyze waveforms, and collaborate with RTL designers to resolve issues.
- Perform block-level and/or SoC-level verification tasks.
- Integrate and verify 3rd-party IPs and custom IPs in subsystem and full-chip environments.
- Collaborate with cross-functional teams including RTL, DFT, DV, firmware, and physical design groups.
- Run regression simulations and ensure verification quality through coverage metrics.
- Automate verification flows to enhance efficiency using scripting languages.
Required Skills & Experience:
- Bachelor's or Master's degree in Electronics, Electrical Engineering, or a related field.
- 4-10 years of experience in digital design verification.
- Strong knowledge of SystemVerilog and UVM methodology.
- Good understanding of digital design concepts, RTL, and timing principles.
- Experience with simulators like VCS, Incisive/Xcelium, Questa, etc.
- Hands-on experience with code and functional coverage, assertions, and checkers.
- Exposure to industry-standard protocols (AXI, AHB, I2C, SPI, PCIe, DDR, etc.).
- Experience in debugging RTL issues using waveform viewers (e.g., DVE, SimVision).
- Strong scripting skills in Python, Perl, Shell, or Make.
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