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Digital Verification Specialist
2 weeks ago
Job Title: Verification Engineer
We are seeking a highly skilled and experienced verification engineer to join our team. The ideal candidate will have a strong background in digital design verification, including experience with UVM and constrained random verification approaches.
Key Responsibilities:- Design and develop complex verification environments using UVM and formal verification techniques.
- Develop and execute test plans to ensure thorough coverage of digital designs.
- Collaborate with cross-functional teams to integrate verification results into the overall product development process.
- Identify and troubleshoot defects in digital designs.
Requirements:
- Bachelor's degree in Electrical Engineering, Computer Science, or related field.
- At least 6 years of experience in digital design verification.
- Strong knowledge of UVM, SystemVerilog, and other relevant digital design verification tools.
- Excellent problem-solving skills and attention to detail.
- Ability to work effectively in a team environment.
Preferred Qualifications:
- Master's degree in Electrical Engineering, Computer Science, or related field.
- Experience with formal verification techniques and assertion-based verification.
- Knowledge of processor/SoC architecture and/or DSP fundamentals.
- Experience with ASIC/SoC product DV & productization.
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