
Electronic Memory Layout Specialist
2 days ago
Expertise in Memory Layout Design is sought after for a key position at our organization.
The ideal candidate will have experience in developing memory compilers layouts and memory Fast Cache instances layouts for next-generation Cores, achieving exceptional results in Power Performance Area (PPA).
Responsibilities include:
- Designing and optimizing memory compilers layouts and memory Fast Cache instances layouts for our next-generation Cores.
- Achieving outstanding PPA through strategic optimization techniques.
Requirements:
- Bachelor's or Master's degree in Electronic Engineering or equivalent field.
- At least 5 years of experience in SRAM/memory layouts creation and backend verifications including EMIR analysis.
- Strong understanding of CMOS Transistors, their behaviors, and CMOS logic design and layout.
- Familiarity with Cadence or Synopsys flows is advantageous.
- Excellent communication skills and ability to review schematics with engineering teams and propose changes based on layout implications.
Nice to Have Skills:
- Basic knowledge of scripting languages such as Perl/skill.
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