
Product Validation Engineer
1 week ago
Chip Design Validation Expert
We are seeking a skilled professional to lead our chip design validation efforts, utilizing cutting-edge tools and technologies to ensure the highest quality of our silicon chips and software content.
This is an exciting opportunity to transform the future through continuous technological innovation and work closely with cross-functional teams to develop and execute comprehensive validation plans.
The ideal candidate will have a deep understanding of digital implementation and logic equivalence checking, exceptional debugging skills, and proficiency in software and scripting languages such as Perl, Tcl, and Python.
You will be responsible for executing and leading product validation of Synopsys's Formality tool by understanding requirements specifications, functional specifications, and customer use cases.
This role involves collaborating with cross-functional teams such as R&D, Product Engineering to develop, implement, and execute comprehensive validation plans based on our technical roadmap and specifications.
You will define and manage scope, schedule, and risks associated with the validation objectives and perform in-depth customer incoming root cause analysis to understand the product weak areas and hot spots and execute proactive testing to improving product quality.
This position requires using product expertise to provide technical recommendations, identify, diagnose and troubleshoot issues, and propose solutions to ensure quality and readiness of the product/solution for customer deployment.
You will analyze product validation data to identify trends, discrepancies, and areas for improvement and prepare detailed validation reports for presenting to multi-functional teams and management.
The impact of this role will be ensuring the quality and reliability of Synopsys's Formality product to keep standing out as a leading LEC solution in the industry, enabling timely and successful deployment of high-performance designs for our customers, contributing to the innovation and advancement of LEC and product validation technologies, and strengthening collaboration and communication across R&D, Product Engineering, and Field teams.
Key Requirements:
- Tech or equivalent and a minimum of 5 years of related experience
- Self-motivated individual with deep domain knowledge in Logic Equivalence Checking (LEC) including expertise in debugging and resolving LEC failures using Synopsyss Formality tool
- Experience and sound knowledge in design implementation including datapath optimization, CTS, UPF and DFT instrumentation
- Sound knowledge in HDL including SystemVerilog and VHDL
- Exceptional debugging skills
- Proficiency in software and scripting skills (Perl, Tcl, Python)
- Experience in cross-functional teamwork, driving projects and mentoring
Benefits:
- A comprehensive range of health, wellness, and financial benefits to cater to your needs
- Total rewards include both monetary and non-monetary offerings
Inclusion and Diversity:
We consider all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
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