
Chief Verification Specialist
1 day ago
Job Overview
As a Lead Formal Verification Engineer, you will be responsible for leading the formal verification team in designing and verifying digital design IPs.
Required Skills and Qualifications
- Hold a Bachelor s or Master s degree in Electrical Engineering, Computer Engineering, or a related field with advanced degrees preferred.
- Have 2 - 6 years of experience in formal verification of digital design IPs with a strong track record in verifying complex IPs.
- Possess a deep understanding of formal verification methodologies including property-based and equivalence checking SystemVerilog Assertions (SVA) and protocol compliance.
- Be familiar with industry-standard formal verification tools such as Cadence JasperGold Synopsys VC Formal or Mentor Questa Formal.
- Have extensive experience in digital design and verification for high-speed interconnect protocols.
Benefits
This role offers the opportunity to work on challenging projects and contribute to the development of cutting-edge technologies.
Others
We are looking for a highly skilled and experienced engineer who can lead the formal verification team and drive the development of innovative solutions.
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