Senior ASIC Physical Designer
2 days ago
We are seeking a skilled Physical Design Engineer to join our team. In this role, you will be responsible for all aspects of physical design for full-chip/block-level designs.
About the Role:- Fundamental Responsibilities: Responsible for designing and implementing full-chip/block-level designs covering floorplanning, placement, budgeting, clock tree planning, routing, timing, and signal integrity analysis.
- Tech Stack: Proficient in EDA tools such as Cadence Innovus, Star-RCXT, Calibre, and internal design automation flows.
- Collaboration: Work closely with methodology teams to address implementation challenges, improve the physical design flow, and provide inputs on technology development.
- Experience: 4+ years of experience in ASIC physical design.
- Technical Expertise: Strong understanding of timing constraints, signal integrity prevention, and power reduction methodologies.
- Tool Proficiency: Experienced in using Synopsys/Cadence/Mentor place-and-route tools.
This is an excellent opportunity to leverage your technical expertise and work collaboratively in a fast-paced environment.
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