
Senior Chip Implementation Engineer
7 hours ago
Chip Design Leadership Opportunity
">Eteros Technologies is seeking a highly skilled and experienced individual to lead the development team on an advanced mixed signal chip project.
This unique opportunity involves working with cutting-edge technologies, collaborating with top engineers and leaders, and driving the design process from RTL to GDS2.
Responsibilities:
">- Leading the implementation of complex mixed-signal SoCs
- Building and guiding a team of implementation engineers
- Working with external IP vendors to integrate blocks into the design
- Ensuring that each aspect of the design meets specified requirements
Required Skills and Qualifications:
">- Experience in all phases of the IC design process from RTL-GDS2
- Analog/Mixed/Custom Signal PNR experience preferred
- Preferably TSMC 7nm PNR sign-off experience using a full COT flow
- Experience in developing PNR methodology/flow and supporting a larger PD team
- Hierarchical Place & Route experience
- Experience in Floorplanning, clock & power network architecture and design
- UPF/CPF power intent flow – multiple supply domains knowledge
- Thorough understanding of digital design, timing analysis, and DFT
- Knowledge of EDA Tools: Cadence (Innovus, Voltus), Mentor (Calibre), Ansys (Redhawk, Totem)
Key Qualifications Include:
">- 5-10 years' experience in chip implementation
- 3-5 years as a top-level lead
- Proven track record of successful final production tape-outs at 16/14nm, 10nm, preferably 7nm
Benefits:
">Competitive compensation, medical benefits, opportunities for career development and growth.
">Join our dynamic team driving innovation and excellence in the semiconductor industry.
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