
Chief Verification Specialist
8 hours ago
We are seeking a highly skilled Senior Design Verification Engineer to join our team. The ideal candidate will have a strong background in functional verification of complex ASIC/SoC designs.
Key Responsibilities:- BUILDING VERIFICATION ENVIRONMENTS FROM SCRATCH and implementing industry-standard methodologies like UVM.
- CONDUCTING REGRESSION TESTS, CODE REVIEWS, and maintaining high quality standards.
- EXPERIENCE IN SYSTEMVERILOG, UVM, AND VERILOG.
The successful candidate will be experienced in functional coverage, assertion-based verification, and constrained random testing. They should also be familiar with scripting languages for automation.
Requirements:- Strong experience in bus protocols like AXI, AHB, SPI, I2C etc.
- Experience working on complex SoCs, IP/Subsystem level verification.
- Experience with formal verification tools (JasperGold, etc.).
- Knowledge of low power verification and DFT-aware verification.
To be considered for this role, you must have a B.E/B.Tech or M.Tech in Electronics, Electrical, or VLSI Engineering.
We offer a challenging and rewarding work environment with opportunities for growth and development.
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