Senior Digital Verification Engineer
3 weeks ago
We are Mulya Technologies, a technology consulting company delivering best-in-class Chip Design Services. Our team is passionate about building a connected and safer tomorrow through our expertise in chip design.
About UsFounded in 2008, we partner with top semiconductor companies to create innovative solutions. With over 40+ tapeouts under our belt, we offer a wide range of semiconductor skills, including embedded design services centered around FW validation & Test Automation.
Our Expertise- Analog IP Design: Foundation - OpAmp, Bandgap; IOs - GPIO, I2C, LVDS; Clocking - PLL; Power - LDO
- PDK, Design Automation: DRC/LVS/Extraction Rule deck Development; PCell Development; Automation Tools in Perl, Python, GoLang
We support a mix of engagement models to cater to diverse client requirements:
- TSMC DCA Partnership
- Collaboration with Academia
- Offshore Design Center
We are seeking a highly skilled DV lead/manager to verify IP/SoC using System Verilog / UVM. The ideal candidate will have exposure to various interface IPs like I2C/SPI/UART/USB/NVM/PCIe; Buses AXI/AHB/APB; ARM-based SoC designs.
Requirements:- 7+ years industry experience with 5+ years in Design Verification using System-Verilog/C/UVM
- Generic knowhow on Digital Design and Verification methodologies
- Experience in System Verilog/UVM based IP/SoC verification using advanced technologies
- Good understanding of Constraint based Random verification; VIP coding; Test Plan design; Test cases coding; Coverage strategies and measurement
- Proficient in EDA tools used for Design Verification (e.g. Cadence/Mentor/Synopsys simulation suites; Verilator)
- Working knowledge of Unix, Linux and SKILL, Shell/Python Script ability
- $120,000 - $150,000 per year salary
- Opportunities for career growth and professional development
- Collaborative and dynamic work environment
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