Senior Digital Design Expert for AI Network Infrastructure

7 days ago

Hyderabad, Telangana, India beBeeEthernet Full time US$ 20,00,000 - US$ 25,00,000

Job Description:

We are seeking a seasoned IP/RTL Design Engineer with over 10 years of experience to design and develop intellectual property (IP) and register transfer level (RTL) for Ethernet switches tailored for AI datacenter backend networks. The ideal candidate will have a strong background in digital design, ASIC/FPGA development, Ethernet protocols, and experience with high-performance interconnect protocols such as InfiniBand, NVLink, Infinity Fabric, with a focus on delivering high-performance, low-latency solutions for large-scale AI workloads.

The successful candidate will be responsible for designing and optimizing IP blocks (MAC, PCS, packet processors) for Ethernet switches, developing synthesizable RTL (Verilog/SystemVerilog) meeting performance and timing goals, optimizing designs for low latency, high throughput, and power efficiency, implementing Ethernet protocols (IEEE 802.3, 100G/400G/800G), ECMP, and congestion control, applying knowledge of InfiniBand, NVLink, or similar protocols for feature implementation, using P4 or related languages for programmable packet processing, collaborating with teams for synthesis, timing closure, and IP integration, documenting designs, and staying updated on AI networking trends.

  • Design Requirements:
  • Proficient in Verilog/SystemVerilog for design.
  • Knowledge of Ethernet (IEEE 802.3, 100G/400G/800G), ECMP, and congestion control.
  • Experience with InfiniBand, NVLink, or similar protocols.
  • Proficiency in P4 or programmable data plane languages.
  • Knowledge of UALink, Ultra Ethernet, or RDMA/RoCE.
  • Familiarity with power optimization or SDN.
  • Familiarity with synthesis (e.g., Synopsys Design Compiler) and timing tools.

Required Qualifications:

Education: BS/MS/PhD in Electrical or Computer Engineering.

Soft Skills: Strong problem-solving, communication, and teamwork skills.

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