Chief Digital Verification Architect
3 weeks ago
Overview:
Infometry seeks a seasoned Senior Design Verification Engineer to spearhead the development and implementation of cutting-edge verification methodologies for complex digital systems.
About the Role:
This challenging position requires a highly skilled professional with in-depth knowledge of UVM verification methodology, system-level architecture, and industry-standard design tools.
Key Responsibilities:
- Develop and implement verification strategies for complex digital systems using UVM methodology.
- Design and test system-level architecture, including buses (AXI/AHB/CHI/ACE5), bridges, memory controllers (DDR3/DDR4/LPDDR3/LPDDR4), and peripherals (USB and Ethernet).
- Utilize VCS, NCSIM, Verdi, and ModelSim to debug waveforms and identify issues.
- Collaborate with cross-functional teams to drive project success.
- Familiarity with processors and boot flow is beneficial.
- Familiarity with software development flow, including assembly and C, is advantageous.
Requirements:
- Strong understanding of UVM verification methodology.
- Knowledge of system-level architecture and bus protocols.
- Excellent waveform debugging skills using front-end design tools.
- Ability to work effectively in a team environment.
- Software development skills, including assembly and C, are beneficial.
Estimated Salary: $120,000 - $180,000 per year
As a valued member of our team, you will enjoy a dynamic work environment, opportunities for growth and development, and a competitive compensation package that includes an estimated salary range of $120,000 - $180,000 per year.
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