
High-Performance Systems Architect
2 days ago
As a key member of our team, you will be responsible for designing and developing high-bandwidth, low-latency on-chip interconnects (NoCs) and chip-to-chip interconnects. You will work closely with cross-functional teams to integrate these designs into high-performance systems.
- Design and architect various interconnect topologies based on bandwidth, latency, and RAS requirements
- Develop features and present proposed architectures in high-level design discussions
- Collaborate with verification, DFT, physical design, FW, and SW teams to develop the feature
- Ensure pre-silicon design signoff meets functional, area, and timing goals
- Participate in silicon bring-up and validation of the hardware
Master's degree required; 8+ years of relevant experience preferred
- At least 1 generation of processor interconnect design delivery leadership experience
- Expertise in SMP coherency and various on-chip interconnect topologies
- Understanding of snoop and data network protocols, latency, and bandwidth requirements
- Working knowledge of queuing theory and numa/nuca architecture
- Proficient in HDLs VHDL/Verilog and experienced in high-speed and power-efficient logic design
- Ability to collaborate with verification, validation, and physical design teams for design closure
This is an opportunity to work on cutting-edge technology and contribute to the development of high-performance systems. As a member of our team, you will have the chance to grow professionally and personally.
OthersWe are committed to creating a positive and inclusive work environment. If you are passionate about technology and innovation, we encourage you to apply for this exciting opportunity.
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