Layout Expert

We drive the innovations that shape our world and connect us.

Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.

We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

Transform the future through continuous technological innovation.

As a talented and experienced layout engineer, you possess a deep understanding of Analog Mixed-signal DDR/HBM IP layout and verification of high-speed digital layouts.

You navigate the complexities of deep submicron effects and have a solid grasp of advanced floorplanning techniques.

Expertise in CMOS and FinFET layouts, especially in process technology of 28nm and smaller, is unparalleled.

Familiarity with the intricacies of ESD and latchup layout design considerations and hands-on experience with ASIC physical design flow, including LEF generation, Place & Route, and top-level verification flows.

Scripting skills for layout automation are a significant plus, and you excel in remote site interaction and layout coordination activities.

Excellent written and verbal communication skills make you an effective collaborator with customers and internal development teams.

Designing high-speed DDR/HBM layouts and providing subject matter expertise and technical leadership in high-speed design domains.

Collaborating with the DDR PHY team, package engineers, and system engineers to meet design specifications.

Performing scheduling duties and coordinating remote site interactions.

Supporting critical layout and floorplanning requirements with the local team.

Coordinating with other layout teams both in Bangalore and globally to detail out layout activities and obtain layout deliverables.

Reviewing and performing quality checks on deliverables from remote layout teams, ensuring strict adherence to internal policies and schedules.

The impact you will have:

Driving innovative layout designs that push the boundaries of high-speed digital and analog mixed-signal technology.

Ensuring the reliability and performance of our DDR/HBM IP by leveraging your expertise in advanced layout techniques.

Contributing to the success of cutting-edge semiconductor solutions through meticulous design and verification processes.

Enhancing team productivity and project efficiency through effective coordination and communication.

Maintaining high standards of quality and adherence to design specifications, ultimately benefiting our end customers.

Fostering a culture of technical excellence and continuous improvement within the layout design team.

Experience in Analog Mixed-signal DDR/HBM IP layout and verification of high-speed digital layouts.

Advanced understanding of deep submicron effects and mitigation strategies, advanced tool usage, and floorplanning techniques.

Solid understanding of CMOS and FinFET layouts and process technology in 28nm and smaller nodes.

Good understanding of ESD and latchup layout design considerations.

Familiarity with ASIC physical design flow: LEF generation, Place & Route, top-level verification flow, DRC/LVS, LPE.

A detail-oriented professional with exceptional problem-solving skills.

An effective communicator with the ability to collaborate across teams and geographies.

A proactive leader who can drive projects to completion while maintaining high quality standards.

A continuous learner who stays updated with the latest advancements in layout design and technology.

A team player who fosters a collaborative and inclusive work environment.

Part of a dynamic and innovative layout design team focused on developing high-performance silicon solutions.

The team collaborates closely with other engineering groups, including the DDR PHY team, package engineers, and system engineers, to deliver state-of-the-art IP solutions.

Our team values technical excellence, creativity, and a commitment to delivering top-quality products.

Comprehensive health, wellness, and financial benefits cater to your needs.

Total rewards include both monetary and non-monetary offerings.

Recruiter details about the salary range and benefits during the hiring process.