
Analog Layout Expert
2 days ago
This is a key position for leading cutting-edge analog semiconductor processes.
Key Responsibilities:- Develop and own all aspects of block/device layout, including schedule planning, tracking, and communicating milestones, floorplan, power-plan, constraint management, layout, verification, extraction, drive, and attend reviews.
- Design individual block layout specification based on top-level layout requirements.
- Reduce area, metal usage while meeting EM and thermal capability.
- Work on new package developments, including Hotrod-QFN, Thin-SOTs, and VSSOPs.
- Implement DFM constraints, such as matching, parasitics, EM, ESD, Latch-up, WPE, LoD, etc.
- Drive productivity improvement initiatives through automation, flow-methodologies improvements, checklists, etc.
- Collaborate with packing team for new package development, optimize layout to fit into multiple packages.
- Minimum 2-5 years of experience in Analog Layout Design.
- Fully conversant with Virtuoso LE/XLS, Assura/Calibre/Hercules for verification and extraction.
- Basic knowledge of perl/skill/shell scripting desirable.
- Must have successfully completed blocks from floorplan to tape-out/PG.
- Layout Basics:
- Block/Toplevel Layout (Floorplanning, Power Planning, Bump planning, Clock route planning).
- Device Layout (Knowledge of best layout practices for minimizing impacts of process mismatches through various matching techniques like common centroid, inter-digitation, addition of dummies etc, matching vs. area tradeoffs, best practices for BJTs, MOS, Resistor layout).
- Interconnect Design (Techniques for EM & IR Drop mitigation, Parasitics minimization, Matching for R/L/C, Crosstalk Mitigation through shielding/isolation etc, Antenna Effect mitigation, Step Coverage/Density effect mitigation).
- ESD & Latch-up (Knowledge of impact of bus resistances, ESD transistor/interconnect DRC, EM constraints, effective guard-ring techniques).
- Noise (Knowledge of and techniques to reduce noise coupling and/or generation through Substrate taps, Guard rings, Shielding, Decoupling Caps, Bondwires, DNW Isolation, Substrate Coupling etc).
- Behavioral:
- Excellent written and verbal communication skills and must be a good team player.
- Demonstrate an attitude with highest levels of integrity and commitment to success. Every assignment small or big needs to be driven with a complete ownership mindset.
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