Senior ASIC Verification Specialist
5 days ago
Job Requirements:
- Required ASIC/RTL design verification engineer with 3-10 years of experience.
- Notice period: immediate to 90 days.
- Salary: as per company.
- Skills: Strong knowledge of SV and UVM.
Role Overview:
The purpose of this role is to develop modules in Cientra techsolutions\'s next generation of ASICs for Radio equipment and Radio Access Network computing. This module performs advanced signal processing, and the role includes test bench systemization, UVM test case development, verification, and product documentation.
Key Responsibilities:
- UVM Verification
- ASIC Verification
- System Verilog
- Scripting
- Verification
- Product documentation
Company Overview:
Cientra techsolutions is a \[company\] providing cutting-edge solutions for Radio equipment and Radio Access Network computing.
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