Design Verification Manager

1 day ago


Thoothukudi, Tamil Nadu, India beBeeVerification Full time ₹ 1,80,00,000 - ₹ 2,20,00,000
Project Lead - Verification Expert

We are seeking a highly experienced Project Lead to manage end-to-end technical leadership, project execution, and team management within the Design Verification domain.

This role requires an individual with extensive expertise in ASIC/SoC Design Verification, SystemVerilog, UVM-based testbench development, coverage closure, debugging, and verification methodologies.

The successful candidate will lead critical projects ensuring on-time, high-quality delivery, define verification strategies, test plans, coverage goals, and closure metrics in alignment with our standards.

  • Lead Design Verification (IP/Sub-System/SoC level) projects.
  • Develop and implement verification strategies, test plans, and coverage goals.
  • Provide technical guidance on SystemVerilog, UVM-based testbench development, coverage closure, debugging, and verification methodologies.
  • Collaborate with architects, designers, and DV engineers across global teams.
  • Manage multi-site DV teams, track progress, and mitigate risks.

Requirements:

  • 14+ years of experience in Design Verification (IP / Subsystem / SoC level).
  • Strong expertise in SystemVerilog, UVM, SVA, and coverage-driven verification.
  • Hands-on knowledge of AMBA protocols (AXI, AHB, APB) and Memory/DRAM verification flows.
  • Experience with Gate Level Simulation (GLS), Low Power (UPF), and Formal Verification is a strong plus.
  • Exposure to EDA tools such as Cadence Xcelium, Synopsys VCS, and Verdi.
  • Proven experience in project/program management, leading DV teams (10+ engineers).
  • Strong stakeholder management, planning, and execution skills.

Benefits:

  • Cutting-edge memory and SoC verification projects.
  • Opportunity to lead high-impact DV programs with global exposure.
  • A fast-track hiring process.
  • A chance to collaborate with a technically strong, innovative team.


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