Senior Implementation Engineer

1 month ago


Bengaluru, Karnataka, India Microchip Technology Full time
Job Title: Senior Engineer II-Implementation

We are seeking an experienced Senior Engineer II-Implementation to join our Wireless Solutions Group (WSG) in Bangalore, India. As a key member of our team, you will be responsible for driving synthesis, static timing analysis, logical equivalence checks, and PPA comparison studies using an industry-leading ASIC design flow.

Key Responsibilities:
  • Implementation engineer supporting WSG Silicon Development
  • Drive and optimize STA methodologies for Microchip's wireless SoC Development
  • Drive SoC timing budgeting, constraint analysis, optimization, and sign-off timing closure
  • Drive and optimize Formal Verification (logic equivalency) methodologies
  • Drive full chip Floorplanning activity
  • Drive PPA benchmarking activities to identify the best-suited IP libraries
  • Work with architecture on cost analysis/die-size estimation in early stages and propose area reduction techniques
  • Interface with design, analog design, verification, product, marketing, and other teams to drive towards a successful SoC development
  • Participate in SoC Implementation planning and scheduling
  • Continuously improve RTL-to-GDS tool flows and methodologies
Requirements/Qualifications:
  • Expertise in Static Timing Analysis, Formal Verification, and Synthesis preferably with Synopsys tools
  • Expertise in full chip Floorplanning
  • Preferable to have hand-on experience in PnR flow, IR Drop Analysis, Physical Verification with Industry standard tools
  • Experience with low-power implementation techniques (UPF)
  • Proficient in common scripting languages (Perl, Python, Tcl, csh, etc.)
  • Knowledge of Design Database Management tools such as DesignSync and revision control tools such as GIT, Perforce, and CVS
  • Solid Written and Verbal Communication skills
  • Experience working with cross-functional global teams
Desired Skills:
  • Experience with ARM/MIPS processor-based subsystem
  • Knowledge of Chip-level Design and Integration activities
  • Knowledge and exposure to complete SOC RTL to GDS to silicon release flow is desired
  • Experience working on WiFi, WLAN, or Bluetooth products
Required Education:

B.Tech or M.Tech in Electrical/Electronic Engineering with 6+ years of experience, M.Tech preferred

Travel Time: 0% - 25%



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