Hardware Validation Specialist

1 week ago

Bengaluru, Karnataka, India beBeeVerificationEngineer Full time ₹ 12,00,000 - ₹ 36,00,000

Our team is seeking a Verification Engineer with experience in designing, verifying, and validating complex hardware systems. The ideal candidate will have a strong background in computer engineering or a related field, as well as excellent problem-solving skills and the ability to work independently.

Job Requirements

The following qualifications are required:

  • Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 9 years of industry work experience, or
  • Master's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 7 years of industry work experience, or
  • PhD in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 5 years of related work experience.

A minimum of 8+ years of experience in relevant Pre-Silicon validation position having gone through multiple project cycles to gather in-depth knowledge is also required. Additionally, solid programming skills in C/C++, Verilog, System Verilog, UVM, assembly, and Python are necessary. Experience with debugging SOC, fabric, NOC, memory, various protocols like PCIE or Ethernet, or other complex ASIC designs is also preferred.

About the Role

This role involves performing functional logic verification of an integrated SoC to ensure design will meet specifications. The successful candidate will define and develop scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications.

The engineer will execute verification plans and define and run emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicating, root causing, and debugging issues in the presilicon environment will also be a key responsibility. Furthermore, the engineer will find and implement corrective measures to resolve failing tests and collaborate and communicate with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features.

Benefits

The successful candidate will have the opportunity to maintain and improve existing functional verification infrastructure and methodology. They will also absorb learning from postsilicon on the quality of validation done during presilicon development, update test plan for missing coverages, and proliferate to future products.

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