High Performance CPU L2 Cache Verification Expert
2 months ago
About the Role
We are seeking an experienced engineer to work on the verification of high-performance CPUs, specifically focused on the L2 cache unit. As a key member of our team, you will be responsible for the functional and performance verification of the L2 cache unit, working closely with the architecture and RTL teams.
Responsibilities
- Verify the functionality and performance of the L2 cache unit, ensuring it meets the required specifications and standards.
- Develop detailed verification plans for the L2 cache, including architectural and microarchitectural functionality.
- Design and develop reusable testbench components in SV, UVM, and C++ that include microarchitectural models, monitors, and checkers.
- Generate random and directed stimulus for pre-silicon, emulation, and post-silicon domains.
- Integrate open-source toolchains into the DV flow and develop the DV environment, tools, and infrastructure to enable functional verification.
- Collaborate with design, test, and post-silicon validation teams to ensure high-quality delivery of the L2 cache block.
Requirements
- BS, MS, or PhD in EE, ECE, CE, or CS with at least 7 years of experience.
- Strong background and experience with high-performance OOO CPU microarchitecture, especially with load/store, caches, and memory subsystems.
- Experience working on x86, ARM, or RISC-V based CPUs.
- Architectural understanding of address translation, memory ordering, cache coherence protocols, memory consistency, multi-processors, and fabric topologies.
- Significant experience debugging RTL and DV in a simulation environment.
- Verification methodologies and techniques: simulation/debug, TB development, stimulus, checking, coverage, infrastructure, tools.
- Experience with C++, SV, UVM, and scripting languages.
- Experience with hardware description languages (Verilog, VHDL) and simulators (VCS, NC, Verilator).
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