Leading Semiconductor Solutions Developer

4 weeks ago


Bengaluru, Karnataka, India Texas Instruments Full time
Job Overview

We are seeking a highly skilled Senior Design Verification Engineer to join our team at Texas Instruments. This is an excellent opportunity for a talented professional to be part of the best custom semiconductor team in the world and drive innovation in the personal electronics domain.

Responsibilities

As a Senior Design Verification Engineer, you will be responsible for driving verification strategy, creating Test Plans, and developing Test Benches for Chip Top. You will have grounds-up development of the DV environment based on system requirements and must have experience with GLS setup. Additionally, you will be responsible for Chip Top Level DV signoff using FV (Formal verification) or SV & UVM.

FV-Based Approach

• Responsible for Chip Top Level DV signoff using FV (Formal verification)

SV & UVM-Based Approach

• Code/develop UVM components like agent, driver, monitor, and score board
• Define and meet all functional coverage goals
• Achieve 100% code coverage (Block, expression, FSM) in IP DV
• Tools: Vmanager, vplan knowledge is a plus
• Able to automate using perl or python

Post-Silicon Activities

• Understanding the generation of functional patterns for ATE
• Interacting with Product Engineering team to characterize IO timing on Silicon by providing AC characterization TDLs
• Interacting with Application Engineering team to ensure successful use of products in the marketplace and support customer applications debug/analysis

What We Expect from You

• Excellent debugging and problem-solving skill
• Effective communication skills to interact with all stakeholders
• Thorough knowledge of standard protocols (e.g., I2C, SPI, UART)
• Team and people skills: The candidate should have good people skills to work closely with the architecture and product apps team
• Exposure to AMS will be added advantages

Preferred Skills/Experience

• 4-10 years of experience in IP DV, SoC DV, and post-silicon debug
• Experience in Cadence simulation tools

Salary

The estimated salary for this position is $120,000 - $180,000 per year, depending on location and experience.

This role requires a strong background in design verification, excellent problem-solving skills, and effective communication abilities. If you are passionate about delivering high-quality solutions and working collaboratively with cross-functional teams, we encourage you to apply.

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