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Senior Digital Fault Testing Engineer

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Palakkad, Kerala, India beBeeDft Full time ₹ 20,00,000 - ₹ 25,00,000
Job Description

As a seasoned DFT expert, you will lead the development and implementation of digital fault testing strategies for complex SoC/ASIC designs. Your primary responsibility will be to drive DFT architecture planning, design, and verification across multiple projects.

You will collaborate with cross-functional teams, including RTL, STA, PD, and test engineering teams, to ensure seamless integration and delivery of world-class testability and manufacturability of silicon products.

Your expertise in scan insertion, compression, ATPG, MBIST, and boundary scan will be essential in defining and driving DFT strategy and architecture for multiple ASIC/SoC projects.

Key responsibilities include: