Senior Physical Design Engineer for High-Performance ASICs

Job Title:Senior Physical Design EngineerJob Description:The successful candidate will be responsible for top-level floor planning, physical design and low power techniques. Key responsibilities include: Performing top-level floor planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing...

Hi All,Eximietas: Eximietas Design is a leading technology consulting and solutions development firm specializing in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains.Hiring: Senior ASIC SOC RTL Design Engineers.Location: Bengaluru or Visakhapatnam.❖ Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics❖...

Responsibilities:Top-level floor planning, PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure, and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks.Worked on 65nm or lower node...

Job Title: Senior ASIC Verification ExpertWe are seeking a highly skilled professional to lead our verification efforts and ensure the quality of our advanced integrated circuits.The ideal candidate will have a strong foundation in verification methodologies, expertise in Verilog or VHDL, and extensive experience with simulation tools and scripting...

We are seeking a highly experienced ASIC SOC RTL design professional to join our organization. The ideal candidate will have a strong understanding of design concepts, with 10+ years of experience in ASIC SOC RTL design.Key Responsibilities:Collaborate with architects and verification teams to meet project deadlinesCoordinate with customer leads to ensure...

Job Title: CPU Architecture and Logic Design LeadAs a Hardware Engineer at , you'll get to work on the systems that are driving the quantum revolution and the AI era.You will be responsible for leading the design and development of a high-bandwidth, low-latency on-chip interconnect (NoC) and chip-to-chip interconnect in high-performance Systems.Design and...

Job Opportunity:">We are seeking a highly skilled Physical Design Engineer to implement block level physical design from RTL to GDSII or netlist to GDSII. The ideal candidate will be responsible for performing block level physical signoff, ensuring block level timing signoff and ECO generation, conducting block level power signoff, and providing technical...

**Career Opportunities in ASIC/SOC Verification** Job Description:We are seeking skilled verification engineers to join our team in Bangalore. The ideal candidate will have experience with power-aware verification, clock and reset verification, and RTL design. Requirements:2-6 years of experience in verification engineeringStrong knowledge of...

Our organization is seeking a skilled and motivated engineer to join its backend implementation team.The ideal candidate will be responsible for implementing complex SoC blocks or full-chip designs, with a focus on performance, power, and area (PPA) optimization and signoff closure.Key Responsibilities:Experience in ASIC EMIR/PD flow and EDA tools experience...

Delivering world-class products requires a deep understanding of integrated circuit design.The ideal candidate will provide technical leadership and guidance to junior engineers, interface with front-end teams to resolve complex issues, and possess excellent communication skills.Key responsibilities include:Designing low-power circuits using voltage islands,...