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Bengaluru, Karnataka, India Eximietas Design Full timeHi All,Greetings' from Eximietas Design....We are Hiring Experience: 7+ yearsLocation: [Across India] & [Bay-Area "Austin"]Job Description:We are seeking an experienced and highly skilled Senior SOC Design Verification Engineer with a strong background in PCIE (Peripheral Component Interconnect Express) to join our team. As a key member of our team, you will...
Senior Design Verification Engineering Lead
7 days ago
At Eximietas Design, we are seeking a highly skilled and experienced Senior Design Verification Engineer to lead our SoC Design Verification efforts. This is an exceptional opportunity to join a dynamic team of engineers who are passionate about delivering high-quality products.
About the RoleWe are looking for a seasoned engineer with expertise in verification of high-speed SoCs and various protocols, including I2C/I3C, SPI, UART, GPIO, QSPI, PCIe, Ethernet, CXL, MIPI, DDR, and HBM. The ideal candidate will have a strong background in System Verilog for verification, including assertions and coverage, as well as experience with gate-level simulations and power-aware verification using Xprop and UPF.
The successful candidate will be responsible for leading and managing a dynamic team of verification engineers, fostering a collaborative and innovative work environment. They will also ensure that all verification signoff criteria are met, with clear and comprehensive documentation.
We offer a competitive compensation package, along with opportunities for professional growth and development. If you are a motivated and results-driven individual who is passionate about design verification, we encourage you to apply.
About UsEximietas Design is a leading provider of innovative solutions in the electronics industry. We are committed to delivering high-quality products that meet the needs of our customers.
Qualifications- 5+ years of hands-on experience in SoC Design Verification
- Expertise in verification of high-speed SoCs and various protocols
- Proficiency in System Verilog for verification, including assertions and coverage
- Experience with gate-level simulations and power-aware verification using Xprop and UPF
- Mentorship experience, providing guidance to junior engineers and managing verification teams
We look forward to hearing from you