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PCIE Expertise Senior Design Verification Lead

2 weeks ago

Bengaluru, Karnataka, India Eximietas Design Full time
Overview

Eximietas Design is seeking a seasoned PCIE Expertise Senior Design Verification Lead to drive the development of innovative semiconductor technologies. As a member of our dynamic team, you will have the opportunity to work on cutting-edge SoC designs and contribute to the creation of high-quality verification environments.

About the Role

This is an exciting opportunity to take your skills to the next level and lead the way in SoC verification. You will be responsible for developing and executing verification plans, creating advanced testbenches, and collaborating with cross-functional teams to ensure successful project delivery.

Responsibilities
  • Develop and execute verification plans for SoC designs, focusing on PCIE subsystems.
  • Create and maintain advanced testbenches using SystemVerilog and UVM.
  • Design and execute test cases to verify PCIE protocol functionality and performance.
  • Debug and resolve functional and performance issues, working closely with design and architecture teams.
  • Develop and enhance verification environments, including reusable components and checkers for PCIE and other interfaces.
  • Conduct coverage-driven verification and ensure complete coverage closure.
  • Collaborate with cross-functional teams to define and refine verification strategies and methodologies.
  • Mentor junior engineers and contribute to the continuous improvement of verification processes.
Requirements
  • 3+ years of hands-on experience in SoC design verification, with a strong focus on PCIE protocols.
  • Expertise in SystemVerilog and UVM.
  • Deep understanding of PCIE specifications (Gen3/Gen4/Gen5) and verification techniques.
  • Strong experience in developing and debugging complex testbenches and test cases for PCIE subsystems.
  • Proficiency in coverage-driven verification and achieving coverage closure.
  • Familiarity with AMBA protocols (AXI, AHB, APB) and other industry-standard interfaces.
  • Knowledge of low-power verification techniques and power-aware simulation.