Chief Wireless System Architect

3 days ago

Vizag, Andhra Pradesh, India beBeeSenior Full time ₹ 2,00,00,000 - ₹ 3,00,00,000

Leadership opportunities are available for seasoned engineers who can guide the development and execution of wireless system-on-chip (SoC) designs. These individuals will lead cross-functional teams in defining, planning, executing, and delivering SoC products that meet market requirements.

Job Responsibilities
  • Define SoC architecture or technical specifications to meet product requirements and maximize intellectual property reuse.
  • Develop design schedules, including milestones and resource requirements, and coordinate with cross-functional teams on dependencies.
  • Track execution, triage issues, and perform prudent escalation. Provide weekly status reports and represent the design community at cross-functional meetings.
  • Maintain design collateral and deliver it to cross-functional teams.
  • Silicon Labs follows established quality procedures and processes to achieve first tapeout.
  • Support validation and product test teams during silicon bringup, validation, characterization, and qualification. Triage, track, and resolve issues reported during silicon evaluation.
Requirements
  • A minimum of 12 years of industry experience in full-chip development cycle is required.
  • Bachelor or Master's degree in Electrical or Computer Engineering is necessary.
  • Hands-on experience in architecture, micro-architecture, digital design processes is essential.
  • Knowledge of high-speed interfaces like USB, PCIe, Ethernet, Mobile DDR, Quad/Octa-SPI is required.
  • Knowledge of peripheral interfaces like SDIO, UART, I2S, I2C, PWM, CAN, etc. is necessary.
  • Knowledge of processors like RISC-V and ARM processors is required.
  • Knowledge of design signoff flows including Lint, CDC, Formal Verification, Synthesis, Constraints, and STA Timing Closure is essential.
  • Knowledge of DFT including Scan, ATPG, MBIST is necessary.
  • Knowledge of low power design methodology (static/dynamic clock gating, power gating, dynamic voltage and frequency scaling) is required.
  • Knowledge of hardware accelerators is essential.
  • Knowledge of Verilog and System Verilog is necessary.
  • Knowledge of scripting languages like Perl, Python, Tcl, shell is required.

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