Design Verification and Test Engineer
6 days ago
We are seeking a highly skilled Design Verification and Test Engineer to join our team. As a key member of our engineering group, you will be responsible for the development, deployment, and support of in-house CAD tools or EDA vendors and flows related to Design Verification, Low Power, Coverage, etc.
The ideal candidate will have a strong background in digital design and verification, with experience in RTL, Verilog, and/or SystemVerilog, UPF Verification, PSS (Portable Stimulus), and Object-Oriented software development in Python, Perl, C++, or other OO languages.
The selected candidate will engage with Designers, DV teams, and management teams to develop Verification solutions that meet the prescribed requirements. Additionally, they will work with customers to understand their needs and define verification scope and activities.
Key Responsibilities:
- Develop, deploy, and support in-house CAD tools or EDA vendors and flows related to Design Verification, Low Power, Coverage, etc.
- Engage with Designers, DV teams, and management teams to develop Verification solutions that meet the prescribed requirements.
- Work with customers to understand their needs and define verification scope and activities.
- Lead team of engineers to perform various pre-silicon verification activities on IPs/Subsystems.
- Anticipate problems and risks and work towards a resolution and risk mitigation plan.
- Assist and mentor the team in day-to-day activities and grow the capabilities of verification team for future assignments.
- Review various results and reports to provide continuous feedback to the team and improve quality of deliverables.
- Report status to management and provide suggestions to resolve any issues that may impact execution.
- Work with peers to improve verification methodology and improve execution efficiency.
Requirements:
- Bachelor's Degree with 5 or more years industry experience or Masters with 2 or more years of experience as a Design Verification engineer or CAD/EDA tools support and development.
- IP/SoC level Verification and Verification Methodology experience.
- Experience with Object-Oriented software development in Python, Perl, C++, or other OO languages, Makefile, Shell Scripting, PCIe.
- Preferred Skills:
- Experience in RTL, Verilog and/or SystemVerilog, UPF Verification, PSS (Portable Stimulus).
- Experience in process automation with Makefile, Shell, PERL/Tcl/Python scripting will be plus.
- Ability to drive company-wide consensus on design tools, flows, and methodologies.
- Ability to document design methodologies and provide training on tools and workflows to design teams.
- Experience with Front-end Digital Design and/or Digital Verification methodologies with a focus on digital and Low Power solutions.
- Demonstrated experience with various EDA software, flows, and architectures.
- UNIX knowledge and experience with data-management software.
- Proven ability to push and drive EDA vendors to improve tools to implement new functionality to solve problems or to optimize existing methods.
- Prior experience debugging vendor tool problems.
- Experience working with engineers and managers to schedule projects and provide schedule updates and roadmaps.
- Strong communication skills and track record of success in a collaborative team environment.
We offer a competitive salary and benefits package, as well as opportunities for professional growth and development. If you are a motivated and talented individual who is passionate about digital verification and CAD tools, we encourage you to apply for this exciting opportunity.
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