Verification IP Engineer
1 month ago
Job Title: Verification IP Engineer - Sr/Staff
Job Description:
We are seeking a highly skilled Verification IP Engineer to join our team at Synopsys Inc. As a Verification IP Engineer, you will be responsible for designing and developing complex verification components using SystemVerilog and OVM/UVM methodology.
Key Responsibilities:
- Design and develop verification components using SystemVerilog and OVM/UVM methodology
- Develop deep protocol insight in NVMe, DDR4/5, DIMMs, HBM2/3 protocol
- Collaborate with cross-functional teams to deploy emerging protocol standards solutions for simulation and emulation platforms
Requirements:
- 3-8 years' experience in the verification domain
- Deep knowledge of simulation and/or emulation technologies with proven triage skills
- Scripting skills
Preferred Qualifications:
- Good knowledge of Verilog and C/C++
- Well-versed with new product deployment challenges at customers across geographies
What We Offer:
- Opportunity to work with a leading company in the electronics design automation industry
- Collaborative and dynamic work environment
- Competitive salary and benefits package
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