Senior Timing Engineer

6 days ago


Bengaluru, Karnataka, India beBeeStaticTimeAnalysis Full time ₹ 1,08,60,000 - ₹ 1,54,70,000
Static Time Analysis Expert

Key Responsibilities:

  1. Perform detailed analysis of timing constraints across Full-Chip, Sub-system, and IP levels.
  • Define and validate timing requirements (clocks, I/O delays, false/multi-cycle paths).
  • Integrate constraints from multiple IPs for hierarchical Static Time Analysis.
  1. Tool Utilization & Flow Integration
  • Use advanced STA tools like Synopsys PrimeTime, Cadence Tempus, or equivalent.
  1. Integrate Static Time Analysis into the overall design flow and automate processes for efficiency.

Expertise in Static Time Analysis: Provide expert guidance on STA methodologies, including setup and hold time analysis, clock domain crossing, and multi-cycle paths for Full Chip, Sub-system, and complex IP timing closure.

  • Deep knowledge of STA tools (such as Synopsys PrimeTime, Cadence Tempus, or Mentor Graphics' ModelSim) including their capabilities, limitations, and best practices.
  • Guide the integration of STA tools into the overall design flow, ensuring compatibility and optimal performance.
  • Oversee the process of achieving timing closure, addressing any timing violations and guiding optimizations to meet performance goals.

Primary Skills:

  • Deep Technical Knowledge: In-depth understanding of STA concepts, EDA tools, and methodologies.
  • Problem-Solving Skills: Strong analytical and problem-solving abilities to tackle complex timing issues.
  • Communication Skills: Ability to communicate complex technical concepts effectively to various stakeholders.
  • Leadership and Mentoring: Experience in leading teams and mentoring less experienced engineers in STA practices.

Secondary skills:

  • Design flow management
  • Ability to improve the execution efficiency through flow automation and other value adds
  • Cross functional coordination
  • Work closely with other teams, such as RTL design, Physical design, verification, and manufacturing, to ensure seamless timing closure of physical design.


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