Digital Chip Designer

4 days ago


Bikaner, Rajasthan, India beBeeDesign Full time ₹ 2,00,00,000 - ₹ 2,50,00,000
Job Summary

We are seeking a highly skilled Physical Design Engineer to join our team. The successful candidate will be responsible for all aspects of physical design, including floorplanning, placement, budgeting, clock tree planning and analysis, scan re-ordering, clock tree synthesis, placement optimizations, routing, timing, and SI analysis/closure.

Key Responsibilities:
  • Responsible for all aspects of physical design for full-chip/block covering floorplanning, placement, budgeting, clock tree planning & analysis, scan re-ordering, clock tree synthesis, placement optimizations, routing, timing, and SI analysis/closure.
  • Collaborate with the methodology team to solve implementation challenges and provide inputs to improve the physical design flow.
  • Experienced in design automation, with a strong understanding of timing constraints, SI prevention, and power reduction.
  • Must have prior experience with Synopsys/Cadence/Mentor place and route tools.
  • Proficient in Unix/TCL/Perl, with good communication and presentation skills.
Requirements:
  • 4+ years experience in ASIC physical design.
  • Experience with block implementation, extraction, timing, or full-chip designs.
  • Strong communication skills.
  • Strong hands-on TCL/Perl development skills.

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