Senior Digital Logic Engineer

FPGA Design Expert - Lead the development of complex digital logic circuits for high-performance applications.Key Responsibilities:Implement digital signal processing, embedded systems, and microcontrollers in FPGA designs.Synthesis, place and route, and optimization of FPGA designs to ensure optimal area, performance, and power consumption.Testbenches for...

Emulation Engineer 4-5 yrs of experience in emulation/prototyping using Cadence/Synopsys tool flows (Palladium/Protium/HAPS/Zebu)~ Working knowledge of System Verilog & Verilog language semantics and compilation flows ~ Experience: 3 to 8 Years ACL Digital, a leader in digital engineering and transformation, is part of the ALTEN Group. At ACL Digital, we...

Job Title:Senior RTL Design EngineerWe are seeking a seasoned Senior RTL Design Engineer to join our team. This is an exciting opportunity for a highly skilled engineer to design and verify complex digital systems.About the Role:This position involves working on cutting-edge digital designs using Verilog and SystemVerilog programming languages. The ideal...

Senior RTL Design EngineersExperience : 3-5 yearsLocation : HyderabadStrong RTL(verilog/system verilog) skills with experience in IP development.• Ability to verify designs by writing simple testbenches.• Strong foundation in logic synthesis and timing closure concepts.• Good knowledge of SoC architecture, AXI bus protocols, hardware debug.•...

Senior RTL Design Engineers Experience : 3-5 years Location : Hyderabad Strong RTL(verilog/system verilog) skills with experience in IP development. • Ability to verify designs by writing simple testbenches. • Strong foundation in logic synthesis and timing closure concepts. • Good knowledge of SoC architecture, AXI bus protocols, hardware debug. •...

Senior RTL Design Engineers Experience : 3-5 years Location : Hyderabad Strong RTL(verilog/system verilog) skills with experience in IP development. • Ability to verify designs by writing simple testbenches. • Strong foundation in logic synthesis and timing closure concepts. • Good knowledge of SoC architecture, AXI bus protocols, hardware debug. •...

Senior RTL Design EngineersExperience : 3-5 yearsLocation : HyderabadStrong RTL(verilog/system verilog) skills with experience in IP development.• Ability to verify designs by writing simple testbenches.• Strong foundation in logic synthesis and timing closure concepts.• Good knowledge of SoC architecture, AXI bus protocols, hardware debug.•...

Job Summary:We are seeking a highly skilled Digital Logic Design Specialist to design, implement and verify digital logic using VHDL/Verilog for FPGA-based systems.This is an exciting opportunity to work on the full FPGA development lifecycle, from architecture design to verification, synthesis, implementation and lab validation. As a key member of our team,...

SSOC Design Verification Engineer - Senior / Lead / Sr. Lead Experience: 5 to 12 Years Location: Hyderabad / Bangalore Job Requirement Must have good knowledge on the verification flows Excellent hands-on debug skills and problem solving attitude. Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC. Experience of...

SSOC Design Verification Engineer - Senior / Lead / Sr. Lead Experience: 5 to 12 Years Location: Hyderabad / Bangalore Job Requirement Must have good knowledge on the verification flows Excellent hands-on debug skills and problem solving attitude. Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC. Experience of working...