Next-Generation Display Subsystem Architect

4 days ago

Bengaluru, Karnataka, India beBeeEngineer Full time ₹ 1,04,000 - ₹ 1,30,878
Display Subsystem Engineer

We are seeking a seasoned Display Subsystem engineer to join our team. The successful candidate will lead front-end design and implementation of next-generation display subsystems, collaborating with cross-functional teams across geographies to ensure high-quality and power-efficient IP integration.

The ideal candidate will have 9+ years of hands-on experience in RTL design and SoC hardware development. Strong domain knowledge in RTL design, integration, and front-end implementation is required. Proficiency in RTL coding using Verilog, VHDL, and SystemVerilog is also essential.

The candidate should have strong debug capabilities across simulation, emulation, and silicon bring-up. Experience working in cross-functional and geographically distributed teams is also necessary. Knowledge of performance and power optimization strategies is highly desirable.

Key Responsibilities:
  • Design leadership for front-end development of Display Subsystem IPs.
  • Perform complete RTL design cycle: microarchitecture, coding, simulation, synthesis, STA, Lint, CDC, and low-power checks.
  • Collaborate with technology and circuit design teams to define and finalize IP specifications.
  • Partner with verification and physical design teams to ensure clean handoff and successful implementation.
  • Integrate Display IP into larger SoC platforms and support SoC teams during system bring-up.
  • Engage with software, test, and system teams to enable and validate low-power features.

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