Senior Chip Design Architect Position
22 hours ago
As a visionary leader, we seek an experienced Chip Design Architect with a proven track record of overseeing the development of complex chip architectures and designs.
The ideal candidate will be responsible for leading multi-block design integration, managing handoff and sign-off of key stages: RTL freeze, synthesis, place & route, static timing analysis, and DFT.
Key responsibilities include driving IP integration, clocking strategy, power domain definition, cross-functional collaboration, and identifying/militating design and schedule risks.
Additionally, the successful candidate will engage with external IP vendors and EDA tool providers to ensure seamless design execution.
Requirements:
- Bachelor's in Electrical Engineering, Electronics, or Computer Engineering
- Preferred - Master's or PhD in VLSI Design, Microelectronics, or Computer Architecture
Desirable skills:
- Digital IC design (RTL to GDSII)
- System-level architecture and IP integration
- Timing closure (STA) and power-performance-area (PPA) optimization
- UPF/CPF for low-power design
- Familiarity with design for manufacturability, test (DFT), and silicon debug.
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