Senior Chip Design Lead
5 days ago
About Mulya Technologies
Mulya Technologies is a cutting-edge semiconductor design company founded by renowned Silicon Valley veterans with its design centers established in Santa Clara and Hyderabad.
As a seasoned professional, you will be part of an elite team of physical design implementation engineers with personal design responsibility for complex chips like Server Chips.
Job Responsibilities:
- Work at various levels of implementation of hierarchical chip (Blocks and Top) including floor plan and partition, power plan, bump plan, integration of different sub-blocks and custom macros/IPs, and physical implementation of blocks.
- Blocks and top-level timing IR analysis and closure, physical verification, develop, support, and maintain physical design flows and methodologies.
Requirements:
- B.Tech / M.Tech from a reputed university with 10-12+ years of experience.
- Good knowledge of VLSI process and device characteristics, experience doing physical design targeted to the 3nm / 5nm/7nm FinFet process.
- Good understanding of static timing analysis (STA), EM/IR, and sign-off, strong hands-on experience with chip level/sub-chip level floor planning, partition, pin assignment, power planning, bump planning, pad ring creation, block level physical implementation, timing closure, physical verification, and chip level integration of different sub-blocks and custom macros/IPs.
- EDA Tool Expertise: Innovus, Tempus/PrimeTime-SI, Voltus/RedHawk, StarXT/Quantus, Calibre, LEC etc. Good software and scripting skills (Python, tcl).
- Good communication skills and the ability and desire to work as part of a team, self-driven individual, and excellent team player.
About the Role:
We are offering a competitive salary package of $200,000 - $250,000 per annum, plus benefits and opportunities for growth and development.
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