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11 hours ago
We are seeking an experienced Senior Analog Layout Engineer to design and develop advanced semiconductor technology.
Key Responsibilities:- Design and verification of full-custom circuit layouts, including RC extraction and physical verification.
- Experience in mixed signal/analog/high speed layout, such as SerDes, ADC/DAC, PLL, etc.
- Familiarity with Cadence Virtuoso environment and industry-standard physical verification tools (DRC,LVS,DFM, etc).
- Proficiency in working with advanced technology nodes under TSMC (32nm/28nm/16nm/14nm/7nm) and preferably 5nm/3nm.
- Good understanding of EMIR analysis, ESD, antenna, and related layout solutions.
- 4+ years of experience in analog layout design, preferably with a Bachelor's or Master's Degree.
- Leadership experience of at least 3 years in hiring, nurturing talent, leading project execution, and client/stakeholder management.
- Excellent communication skills and hands-on expertise.
- Good learning competency, self-motivation, and ability to work in diverse areas in a flexible and dynamic environment.
- Programming skills and automation background.
- Circuit Design experience.
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