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Digital Circuit Verification Specialist
3 weeks ago
Job Overview:
We are seeking a highly skilled Design Verification Engineer to ensure the correctness and functionality of digital circuits.
Main Responsibilities:
- Verify designs using various methodologies, including ZD/PAGLS/SDF/Scan dump
- Debug Netlist functional failures and low power aware verification
- Conduct timing simulation and setup/hold violation analysis
- Develop test plans based on specifications and industry standards
- Utilize System Verilog, UVM, and other tools to increase bug detection and resolution rates
- Familiarity with DDR families (LP/PC) and generations (DDR2/3/4/5)
- Understanding of bus protocols like AHB/AXI/ACE/ACE-Lite
Key Qualifications:
- 3-5 years of experience in design verification
- Hands-on experience with GLS, ZD/PAGLS/SDF/Scan dump verification
- Strong debug, UVM, System Verilog, and digital fundamentals
- Good understanding of system-level design and architecture
Preferred Skills:
- Experience with low power aware verification and scan dump verification
- Familiarity with monitors, scoreboards, sequencers, and sequences
- Scripting skills in System Verilog, UVM, and other languages
