
Senior Analog Mixed Signal Verification Specialist
17 hours ago
Job Overview
We are seeking an experienced Senior Analog Mixed Signal Verification Specialist to lead the development and execution of verification strategies for analog/mixed-signal IPs and SoCs.
The ideal candidate will design and implement verification plans, including testbenches, stimulus generation, and checking strategies. They will develop and maintain SystemVerilog, Verilog-AMS, or UVM-based verification environments.
This specialist will perform co-simulation of analog/digital designs using industry tools (e.g., Cadence, Synopsys, Siemens EDA). They will conduct mixed-signal simulations, behavioral modeling of analog blocks, and integration into top-level environments.
The successful candidate will collaborate with analog designers to create AMS behavioral models (e.g., Verilog-A/AMS) for early integration and verification. They will debug complex AMS simulation issues across multiple abstraction levels.
This role involves driving coverage analysis and sign-off using functional, formal, and assertion-based methods. The specialist will mentor and guide junior engineers in best practices, methodologies, and tool usage.
The chosen candidate will ensure verification deliverables meet project timelines and quality standards.
Requirements
- A minimum of 8+ years of hands-on AMS verification experience in IP/SoC projects.
- A proven track record in building verification environments using SystemVerilog, Verilog-AMS, or UVM.
- A strong background in mixed-signal simulation and behavioral modeling.
Qualifications
A Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
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